IEEE 802.11 Wireless Network Simulator Using Verilog

This paper presents a basic IEEE 802.11 network simulator using Verilog. Basic aim of this paper was to design a simulator using a hardware description language (HDL) such as Verilig, since the functions and protocols described in a state machines are best simulated using a HDL. Many of the security vulnerabilities in IEEE 802.11 are due to unauthenticated / unencrypted management and control frames which result in a number of Denial of Service (DoS) attacks. Current IEEE 802.11 simulators deal with Physical and MAC layers and do not include the exchange of management and control frames, thus making it difficult to simulate an attack (DoS) and its possible solution. The proposed simulator includes the communication setup process and can be used for simulating DoS attacks and its possible solutions. Key-Words: Network Simulator, IEEE 802.11, Verilog, Wireless LAN, Link layer simulation.